Books and Book Chapters

  1. T. Zheng, A. Kaul, S. Kochupurackal Rajan, and M. S. Bakir, "Polylithic Integrated Circuits using 2.5D and 3D Heterogeneous Integration: Electrical and Thermal Design Considerations and Demonstrations," in Embedded and Fan-Out Wafer and Panel Level Packaging Technologies for Advanced Application Spaces, B. Keser, and S. Kröhnert, Eds. Wiley, 2021, pp. 261-287.

  2. R. Saligram, A. Kaul, M. S. Bakir, and A. Raychowdhury, “Multilevel Signaling for High-Speed Chiplet-to-Chiplet Communication,” in A. Calimera, P.-E. Gaillardon, K. Korgaonkar, S. Kvatinsky, R. Reis (Ed.), VLSI-SoC: Design Trends, (1st ed., pp. 149–178) Springer Cham, 2021.

  3. M.Zia, C.Wan, Y. Zhang and M.S. Bakir, “Electrical and photonic off-chip interconnection and system integration,” in Tolga Tekin, Nikos Pleros, Richard Pitwon, and Andreas Hakansson (Ed.), “Optical Interconnects for Data Centers,” (1st Edition p.265-286), Woodhead Publishing, Nov. 2016

  4. H. S. Yang, P. Thadesar, C. Zhang, M.S. Bakir, (2013). Mechanically Flexible Interconnects and TSVs: Applications in CMOS/MEMS Integration. In L. A. Francis and K. Iniewski (Ed.), Novel Advances in Microsystems Technologies and Their Applications (1st ed., p45-p68). FL, USA: CRC Press

  5. H. S. Yang, P. Thadesar, C. Zhang, M.S. Bakir, (2013). Mechanically Flexible Interconnects and TSVs: Applications in CMOS/MEMS Integration. In V. Choudhary and K. Iniewski (Ed.), MEMS: Fundamental Technology and Applications (1st ed., p111-p130). FL, USA: CRC Press

  6. M. Bakir, G. Huang, and B. Dang, "3D Integration: Limits and Opportunities," in Coupled Data Techniques, R. Ho and R. Drost (Eds.), Chapter 2, Springer, 2010.

  7. B. Dang, M. Bakir, D. Sekar, C. King, and J. Meindl, "Single and 3D Chip Cooling using Microchannels and Fluidic I/Os," in Integrated Interconnect Technologies for 3D Nanoelectronic Systems, M. Bakir and J. Meindl (Eds.), Artech House 2009.

  8. G. Huang, K. Shakeri, A. Naeemi, M. Bakir, and J. Meindl, "On-Chip Power Supply Noise Modeling and Chip/Package Co-Design of Gigascale and 3D Integrations," in Integrated Interconnect Technologies for 3D Nanoelectronic Systems, M. Bakir and J. Meindl (Eds.), Artech House 2009.

  9. M. Bakir and J. Meindl (Eds.), "Integrated Interconnect Technologies for 3D Nanoelectronic Systems", Artech House, 2009. (16 chapters; 550-pages)

  10. M. Bakir and J. Meindl, "Revolutionary Silicon Ancillary Technologies for the Next Era of Gigascale Integration," in Integrated Interconnect Technologies for 3D Nanoelectronic Systems, M. Bakir and J. Meindl (Eds.), Artech House 2009.

  11. M. Bakir, "Nanoimprint Lithography for Semiconductor and Interconnect Technologies," in NanoTechnology: An Open Text, S. Campbell (Ed.), NSF NNIN 2007.