lab-member-pic
 

Srujan Penta

  • Ph.D Student

 Srujan.penta@gatech.edu
 
 

Biography

  • MS in Electrical and Computer Engineering, Georgia Institute of Technology
  • B.E. (Hons.) in Electrical and Electronics Engineering, BITS Pilani
  • Pronouns: He/Him

Research Interests

  • 2.5D and 3D Heterogeneous Integration 

  • Fan-out Wafer level Packaging 

Thesis

All Publications

  1. R. Krishna, A. Victor, S. Penta, X. Chen, M. S. Bakir, N. S. Kim and E. Rosenbaum, "Yield-Aware Interposer Design for UCIe Interconnects," 2024 IEEE 33rd Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), Toronto, ON, Canada, 2024, pp. 1-3, doi: 10.1109/EPEPS61853.2024.10753661.

  2. S. Penta, T. Zheng, E. Tremble, A. Chakravarti, A. Sigler, Z. Zhang, C. Benes, M. S. Bakir and W. Sauter, "Performance Evaluation of UCIe-based Die-to-Die Interface on Low-Cost 2D Packaging Technology," 2024 IEEE 74th Electronic Components and Technology Conference (ECTC), Denver, CO, USA, 2024, pp. 274-278, doi: 10.1109/ECTC51529.2024.00052.